A 15 Gb/s Single-Ended Active-Inductive Equalizer with an Optimized Gain-Enhancing Technique
- In this paper, a 15 Gb/s single-ended active inductive linear equalizer with an improved gain-enhancing method is presented. The proposed architecture consists of an activeinductive single-stage continuous-time linear equalizer (CTLE) to compensate for the high-frequency channel loss followed by a common-source stage with resistive load to generate a noninverting output as well as enhance the signal swing and sampling margin. Furthermore, an optimized gain-enhancing technique is introduced in the CTLE stage which noticeably improves the low-frequency gain and the output signal swing. In order to evaluate the performance of the proposed gain-enhanced CTLE, two common active-inductive CTLE approaches were designed and simulated in 12nm FinFET technology to compare with the proposed architecture. The simulation results show that the proposed gain-enhancing technique improves the output signal swing of the CTLE by 30% compared to the state-of-the-art with no power and area overhead. The proposed equalizer draws 1.74 mW at a Nyquist frequency of 7.5 GHz and a supply voltage of 0.8 V. In addition, it compensates for a channel attenuation of 22 dB with a figure-of-merit (FoM) of 5.27 fJ/bit/dB, indicating a considerable improvement over previous studies.
| Author: | Mohammadreza Esmaeilpour, Marco Mestice, Jan Lappas, Christian Weis, Norbert Wehn |
|---|---|
| URN: | urn:nbn:de:hbz:386-kluedo-131183 |
| Parent Title (English): | 2025 IEEE 28th International Symposium on Design and Diagnostics of Electronic Circuits and Systems (DDECS) |
| Document Type: | Conference Proceeding |
| Language of publication: | English |
| Date of Publication (online): | 2025/06/01 |
| Year of first Publication: | 2025 |
| Publishing Institution: | Rheinland-Pfälzische Technische Universität Kaiserslautern-Landau |
| Date of the Publication (Server): | 2026/05/13 |
| Page Number: | 5 |
| Source: | https://doi.org/10.1109/DDECS63720.2025.11006794 |
| Faculties / Organisational entities: | Kaiserslautern - Fachbereich Elektrotechnik und Informationstechnik |
| CCS-Classification (computer science): | B. Hardware / B.7 INTEGRATED CIRCUITS |
| DDC-Cassification: | 5 Naturwissenschaften und Mathematik / 500 Naturwissenschaften |
| Licence (German): | Lizenz nach Originalpublikation |
