Investigate the hardware description language Chisel - A case study implementing the Heston model

  • This paper presents a case study comparing the hardware description language „Constructing Hardware in a Scala Embedded Language“(Chisel) to VHDL. For a thorough comparison the Heston Model was implemented, a stochastic model used in financial mathematics to calculate option prices. Metrics like hardware utilization and maximum clock rate were extracted from both resulting designs and compared to each other. The results showed a 30% reduction in code size compared to VHDL, while the resulting circuits had about the same hardware utilization. Using Chisel however proofed to be difficult because of a few features that were not available for this case study.

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Author:Christopher Stumm, Christian Brugger, Norbert Wehn
Document Type:Report
Language of publication:English
Date of Publication (online):2013/10/28
Date of first Publication:2013/09/25
Publishing Institution:Technische Universität Kaiserslautern
Date of the Publication (Server):2013/10/28
Tag:Chisel; Field-programmable gate array (FPGA); Financial Mathematics; Hardware Description Language (HDL); Heston Model; VHDL
Page Number:2
Faculties / Organisational entities:Kaiserslautern - Fachbereich Elektrotechnik und Informationstechnik
DDC-Cassification:6 Technik, Medizin, angewandte Wissenschaften / 620 Ingenieurwissenschaften und Maschinenbau
Licence (German):Standard gemäß KLUEDO-Leitlinien vom 10.09.2012