Property-Driven Design
- We introduce Property-Driven Design, a tool-flow that guarantees formal soundness be- tween ESL and RTL and thus enables a shift-left of general functional verification by moving HW verification to higher abstraction layers. In addition, by generating a formal Verification IP (VIP) automatically from ESL descriptions, the entry hurdle to formal methods is reduced considerably, opening them to a wider audience, which effectively ‘democratizes’ them. Short feedback cycles reduce time spent on RTL verification and lead to higher-quality designs.
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| Author: | Tobias Ludwig |
|---|---|
| URN: | urn:nbn:de:hbz:386-kluedo-66359 |
| DOI: | https://doi.org/10.26204/KLUEDO/6635 |
| Subtitle (German): | A new approach for hardware design |
| Advisor: | Wolfgang Kunz |
| Document Type: | Doctoral Thesis |
| Language of publication: | English |
| Date of Publication (online): | 2021/10/31 |
| Year of first Publication: | 2021 |
| Publishing Institution: | Technische Universität Kaiserslautern |
| Granting Institution: | Technische Universität Kaiserslautern |
| Acceptance Date of the Thesis: | 2021/07/16 |
| Date of the Publication (Server): | 2021/11/11 |
| Tag: | EDA; PDD; Property-Driven Design; formal; hardware; verification |
| Page Number: | 141 |
| Faculties / Organisational entities: | Kaiserslautern - Fachbereich Elektrotechnik und Informationstechnik |
| CCS-Classification (computer science): | B. Hardware |
| DDC-Cassification: | 6 Technik, Medizin, angewandte Wissenschaften / 620 Ingenieurwissenschaften und Maschinenbau |
| MSC-Classification (mathematics): | 94-XX INFORMATION AND COMMUNICATION, CIRCUITS |
| Licence (German): |  Creative Commons 4.0 - Namensnennung (CC BY 4.0) |